Combining Equalization and Reclocking
Figure 8 shows the same signal from Figure 7 (previous page), but after having gone through the FR4 optimized equalizer on the input to the LMH0356 reclocker. This equalizer removes the bulk of the deterministic jitter that was introduced by the bandwidth limitation of the system interconnect.
Figure 8: 3Gbps Signal after FR4 equalization
Figure 9 shows the output of the LMH0356 reclocker with the signal from Figure 7 as its input. The PLL in the LMH0356 has been used to eliminate most of the signal’s random jitter. In this case, you have brought the original signal, which may have marginally met your jitter budget, to a signal that is ready for use as a very clean signal.
Figure 9: 3Gbps signal after both equalization and reclocking
Summary
SMPTE has established a codified method for measuring and specifying jitter, and any professional system must be specified according to these methods. Unfortunately the methods specified by SMPTE do not lend themselves to determining the source of the jitter or to do further analysis with the jitter. Jitter in a system determines the bit error rate of the system, and this bit error rate can be predicted if the jitter is analyzed by breaking its components into random jitter and deterministic jitter.
System jitter can be reduced, both through careful design practice, and through the use of components such as equalizers and reclockers. Even if your jitter budget is getting dangerously close to being exceeded, equalizers and reclockers can provide you with a bailout that will bring your system back into the black.
About the author:
Mark Sauerwald graduated from the University of California at San Diego in 1982 with a bachelor’s degree in electrical engineering. Since graduation, Mark has been involved in semiconductor components for digital video — first at TRW LSI products, working on A/D converters for digital video, then at Comlinear, later acquired by National Semiconductor. Mark spent a few years working for Gennum Corporation before returning to National Semiconductor where he now works as an Applications Engineer with the Mixed-Signal Product Division. When not working, Mark is an avid cyclist, and a serious amateur photographer. He can be reached at mark.sauerwald@nsc.com
