DisplayPort Architecture
A DisplayPort cable has four lanes and operates at a data rate of either 10.8 Gbps or 6.48 Gbps - negotiated by the source and receiver depending on the length and quality of the cable. This link rate is independent from the display pixel rate. To conserve power, the source and receiver can negotiate to use fewer lanes if the full bandwidth is not required.
DisplayPort transfers data using a micro-packet architecture where each lane packs data into transfer units of 64-byte symbols per lane. In addition to the main video data, the micro-packets could also carry digital audio data. Each video line is followed by a video stream attribute data field to define blanking, interlace and audio/video muting. All data is supported by redundancy and error correction coding (ECC) to ensure very low bit error rates (BER).
The micro-packet architecture enables the transport of multiple audio and video streams and other data types concurrently, which enables multiple video and audio packets to be transmitted on the same cable. By using this micro-packet architecture, together with the high available bandwidth 10.8 Gbps link speed, it enables either picture-in-picture or multiple daisy-chained monitors through a single connection. Current daisy-chain solutions require either extra USB cables, RS-232 cables or proprietary cables to implement. The single DisplayPort cable bandwidth is sufficient to support one 1080p @120Hz panel or up to four 19-inch 1440×900 panels.
With the confluence of small connectors, link bandwidth and multiple A/V micro-packet technology, we will soon be able to watch downloaded HD movies on full 1080p HD @120Hz, with 7.1 audio, that are connected via a 15-meter DisplayPort cable to a mobile Internet device or smartphone that has a mini DisplayPort connector.
As the size of the monitor and notebook continues decreasing, designers have to do their best to keep the costs of designing these new smaller devices from increasing. Using DisplayPort in a new design can help save costs. Many current flat-panel displays incorporate complex electronics, allowing them to mimic older CRT monitors so they can be backward compatible with any VGA or DVI graphics card, which increases the manufacturing cost.
Figure 2. Block Diagram of a Typical DisplayPort Receiver
New monitors that only support the DisplayPort direct-drive interface can cost less to manufacture because scaling, dithering and other functions typically found in CRT-mimicking monitors can now be removed. Figure 2 shows a block diagram for a typical DisplayPort receiver.
The main data paths in a receiver are the SerDes, video processor, scaler, timing controller and output driver. Typically, the output drivers are Reduced Swing Differential Signaling (RSDS) or mini Low-Voltage Differential Signaling (mLVDS).
NEXT: The DisplayPort Interface, SerDes Initialization
Page 2: next page
